firmware  v0.1.2
Chromation Spectrometer Dev-Kit
Functions
SpiSlave.h File Reference
#include <stdint.h>
#include <stdbool.h>
#include "ReadWriteBits.h"
#include "Spi.h"

Go to the source code of this file.

Functions

void _SignalDataReady (void)
 
void _SignalDataNotReady (void)
 
void DisableSpiInterrupt (void)
 
void EnableSpiInterrupt (void)
 
void SpiSlaveInit (void)
 
void SpiSlaveTxByte (uint8_t input_byte)
 
void SpiSlaveTx (uint8_t const *input_buffer, uint16_t nbytes)
 

Detailed Description

API

void DisableSpiInterrupt(void);
void EnableSpiInterrupt(void);
void SpiSlaveInit(void);
void SpiSlaveTxByte(uint8_t input_byte);
void SpiSlaveTx(uint8_t const *input_buffer, uint16_t nbytes);

Definition in file SpiSlave.h.

Function Documentation

◆ _SignalDataNotReady()

void _SignalDataNotReady ( void  )
inline

Drive Data Ready HIGH.

Definition at line 31 of file SpiSlave.h.

◆ _SignalDataReady()

void _SignalDataReady ( void  )
inline

_SignalDataReady behavior:

  • drives DataReady LOW

SPI Slave outputs signal Data Ready.

  • Data Ready LOW signals next byte of data is ready.
  • SPI Master waits for Data Ready LOW before reading a byte from the SPI Slave.
  • SPI Slave drives Data Ready HIGH after each byte of SPI transfer.

Definition at line 14 of file SpiSlave.h.

◆ DisableSpiInterrupt()

void DisableSpiInterrupt ( void  )
inline

Clear SPIE bit in SPCR to disable the SPI ISR.

DisableSpiInterrupt behavior:

  • clears the SPI Interrupt Enable bit

Note:

  • Even with the SPI ISR disabled, interrupt flag bit SPIF in register SPSR is still set when a serial transfer completes.
  • Check the flag by calling _SpiTransferIsDone()
  • Clear SPIF manually by calling ClearSpiInterruptFlag()

Definition at line 48 of file SpiSlave.h.

◆ EnableSpiInterrupt()

void EnableSpiInterrupt ( void  )
inline

EnableSpiInterrupt behavior:

  • clears SPI interrupt flag
  • enables SPI transfer complete interrupt
  • consumes 6 cycles

Set SPIE bit in SPCR to execute the SPI ISR when:

  • the Global Interrupt Enable bit is set in SREG
  • bit SPIF in register SPSR is set
    • bit SPIF in register SPSR is set when a serial transfer completes
    • SPIF is cleared when executing the SPI ISR
    • alternatively, SPIF is cleared by first reading the SPI status register, then accessing the SPI data register

Definition at line 77 of file SpiSlave.h.

◆ SpiSlaveInit()

void SpiSlaveInit ( void  )
inline

SpiSlaveInit behavior:

  • makes DataReady an output pin
  • idles DataReady high
  • makes Miso an output pin
  • enables SPI
  • enables SPI interrupt

Definition at line 118 of file SpiSlave.h.

◆ SpiSlaveTx()

void SpiSlaveTx ( uint8_t const *  input_buffer,
uint16_t  nbytes 
)
inline

SpiSlaveTx behavior:

  • sends nbytes of input buffer to SpiMaster

Definition at line 202 of file SpiSlave.h.

◆ SpiSlaveTxByte()

void SpiSlaveTxByte ( uint8_t  input_byte)
inline

Transmit a byte and ignore byte received.

SpiSlaveTxByte behavior:

  • loads SPI data register with input byte
  • disables SPI ISR before signaling data ready
  • drives DataReady LOW to signal data is ready
  • waits until SPI transfer is done
  • drives DataReady HIGH immediately after SPI transfer finishes
  • enables SPI ISR after transfer

Definition at line 150 of file SpiSlave.h.